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ACM SIGPLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04)

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Technical Program and Schedule

Friday, June 11 (Executive Forum)

1:15pm-1:30pm -- Welcome

Ron Cytron (program chair) and David Whalley (general chair)

1:30pm-3:00pm -- Session I: Evaluating Embedded Applications (session chair: Mary Jane Irwin)

GraalBench: A 3D Graphics Benchmark Suite for Mobile Phones, Iosif Antochi, Ben Juurlink, Stamatis Vassiliadis (Delft University) and Petri Liuhi (NOKIA)

Modeling and Simulating E-Textile Applications, Thomas Martin, Mark Jones, Joshua Edmison, Tanwir Sheikh, Zahi Nakad (Virginia Tech)

Spinach: A Liberty-based Simulator for Programmable Network Interface Architectures, Paul Willman, Michael Broglioli, Vijay Pai (Rice University)

3:00pm-3:30pm -- break (Executive Forum Foyer)

3:30pm-5:00pm -- Session II: Languages and Software Architectures (session chair: Bruce Childers)

NDL: A Domain-Specific Language for Device Drivers, Christopher L. Conway, Stephen A. Edwards (Columbia University)

Asynchronous Software Thread Integration for Efficient Software Implementations of Embedded Communication Protocol Controllers, Nagendra J. Kumar, Shiddhartha Shivshankar, Alexander G. Dean (North Carolina State University)

A Formal Concurrency Model Based Architecture Description Language for Synthesis of Software Development Tools, Wei Qin, Subramanian Rajagopalan, Sharad Malik (Princeton University)

5:00pm-5:45pm -- Keynote Speaker: Helen Gill -- "NSF Sponsored Research Activities in Embedded Systems"

6:00pm-7:00pm -- LCTES Steering Committee Meeting (Imperial One)

7:00pm-9:00pm -- Reception (Roosevelt Room)

Saturday, June 12 (Executive Forum)

7:00am-8:00am -- Breakfast (Executive Forum Foyer)

8:00am-10:00am -- Session III: Power Management I (session chair: Daniel Kaestner)

Procrastination Scheduling in Fixed Priority Real-Time Systems, Ravindra Jejurikar (University of California, Irvine), Rajesh Gupta (University of California, San Diego)

Power-Efficient Prefetching via Bit-Differential Offset Assignment on Embedded Processors, Xiaotong Zhuang, Santosh Pande (Georgia Institute of Technology)

Speculative Software Management of Datapath-width for Energy Optimization, Gilles Pokam, Olivier Rochecouste, Andre Seznec, Francois Bodin (IRISA)

Dynamic Voltage Scaling for Real-Time Multi-Task Scheduling Using Buffers, Chaeseok Im, Soonhoi Ha (Seoul National University)

10:00am-10:30am -- break (Executive Forum Foyer)

10:30am-noon -- Session IV: Power Management II (session chair: Al Mok)

A trace-based binary compilation framework for energy-aware computing, Lian Li, Jingling Xue (University of New South Wales)

ESys.NET: A New Solution for Embedded Systems Modeling and Simulation, J. Lapalme, E.M. Aboulhamid, G. Nicolescu, L. Charest, F.R. Boyer, J.P. David, G. Bois (Universite de Montreal and Ecole Polytechnique de Montreal)

XTREM: A power simulator for the Xscale microprocessor, Gilberto Contreras, Margaret Martonosi (Princeton University), Jinzham Peng, Roy Ju, Guei-Yuan Lueh (Intel)

noon-1:30pm -- lunch (Culpeper Room and Longworth Room)

1:30pm-3:00pm -- Session V: Caches and Instruction Sets (session chair: Alex Dean)

Feedback Driven Instruction-Set Extension, Dinh Khoi Le, Adrian Slowik, Michael Thies, Uwe Kastens (University of Paderborn)

Compositional Static Instruction Cache Simulation, Kaustubh Patil, Kiran Seth, Frank Mueller (North Carolina State University)

Measuring the Cache Interference Cost in Preemptive Real-Time Systems, Johan Staerner, Lars Asplund (Malardalen University)

3:00pm-3:30pm -- break (Executive Forum Foyer)

3:30pm-5:00pm -- Session VI: Code Management (session chair: Chandra Krintz)

Adaptive Code Unloading for Resource-Constrained JVMs, Lingli Zhang, Chandra Krintz (University of California, Santa Barbara)

Advanced Control Flow in Java Card Programming, Peng Li, Steve Zdancewic (University of Pennsylvania)

Synthesizing Fast Code from Concurrent Program Dependence Graphs, Jia Zeng, Cristian Soviani, Stephen A. Edwards (Columbia University)

5:00pm-6:00pm -- Student Poster Session (Culpeper Room)

Sunday, June 13 (Executive Forum)

7:00am-8:00am -- Breakfast (Executive Forum Foyer)

8:00am-9:30am -- Session VII: Register Allocation (session chair: Rajiv Gupta)

EMBARC: An Efficient Memory Bank Assignment Algorithm for Retargetable Compilers, Jason D. Hiser, Jack W. Davidson (University of Virginia)

Hardware-managed Register Allocation for Embedded Processors, Tao Zhang, Xiaotong Zhuang, Santosh Pande (Georgia Institute of Technology)

A Retargetable Register Allocation Framework for Embedded Processors, Jean-Marc Daveau, Thomas Thiery, Thierry Lepley, Miguel Santana (STMicroelectronics)

9:30am-10:00am -- break (Executive Forum Foyer)

10:00am-11:30am -- Session VIII: Compilers and Optimization (session chair: Yunheung Park)

Link-Time Optimization of ARM Binaries, Bruno De Bus, Bjorn De Sutter, Ludo Van Put, Dominique Chanet, Koen De Bosschere (Ghent University)

Optimizing for Space and Time Usage with Speculative Partial Redundancy Elimination, Bernhard Scholz (University of Sydney), Nigel Horspool (University of Victoria), Jens Knoop (Technische Universitaet Wien)

Finding Effective Compilation Sequences, L. Almagor, Keith D. Cooper, Alexander Grosul, Timothy J. Harvey, Steven W. Reeves, Devika Subramanian, Linda Torczon, Todd Waterman (Rice University)

11:30am-1:00pm -- lunch (Ballroom One)

1:00pm-2:30pm -- Session IX: Software (session chair: E. Christopher Lewis)

Code Protection for Resource-Constrained Embedded Devices, H. Saputra, G. Chen, R. Brooks, N. Vajaykrishnan, M. Kandemir, M. J. Irwin (Pennsylvania State University)

Input Data Reuse In Compiling Window Operations Onto Reconfigurable Hardware, Zhi Guo, Betul Buyukkurt, Walid Najjar (University of California, Riverside)

Flattening Statecharts without Explosions, Andrzej Wasowski (University of Copenhagen)

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